1. Field of the Invention
The present invention relates to a protection circuit for a power conversion apparatus having semiconductor switching elements. The protection circuit detects abnormality in the power conversion apparatus and interrupts a power supply to a driving circuit for the switching elements, thereby protecting the power conversion apparatus.
2. Description of the Related Art
FIGS. 3(a) and 3(b) show essential parts of a conventional protection circuit for a power conversion apparatus such as an inverter.
The protection circuit of FIG. 3(a) is called a series-connected redundancy circuit. On an abnormality in the power conversion apparatus, the protection circuit interrupts power supply to a gate driving circuit for semiconductor switching elements such as IGBTs that compose the power conversion apparatus. This interruption is carried out by switches 21 and 22 composed of relays or transistors that are series-connected to each other. The protection circuit of FIG. 3(b) is called a parallel-connected redundancy circuit. The protection circuit interrupts power supply to a gate driving circuit for upper arm switching elements and power supply to a gate driving circuit for lower arm switching elements of the power conversion apparatus by means of parallel-connected switches 21 and 22 separately for the respective gate driving circuits.
In FIGS. 3(a) and 3(b), the reference numeral 10 represents a control circuit board for controlling the switches 21 and 22 according to an interruption signal emitted on an abnormality in the power conversion apparatus; the symbols 20A and 20B represent driving circuit board for supplying or interrupting the power supply to the gate driving circuit; the reference numeral 11 represents a signal input terminal for receiving the interruption signal; the reference numeral 12 represents a photo-coupler for signal isolation; and the reference numeral 13 represents a CPU.
The protection circuit of FIGS. 3(a) and 3(b) perform protection for the power conversion apparatus on an abnormality such as a short-circuit fault with the semiconductor switching elements in the following way. An interruption signal received at the signal input terminal 11 is given through photo-couplers 12 to the switches 21 and 22, which are simultaneously turned OFF to interrupt power supply to the gate driving circuit. As a consequence, all the switching elements are turned OFF to interrupt output of the power conversion apparatus. Thus, the power conversion apparatus is protected.
In order to ensure redundancy required by the safety standards, it is assumed that a plurality of switches, the switches 21 and 22 in the example of FIGS. 3(a) and 3(b), are connected in series or in parallel and every time operate in the same state, which means that every switch is in the ON state or every switch is in the OFF state.
The safety standards further require that a fault of each switch causing failure of redundancy has to be detected as much as possible. Accordingly, the CPU 13 reads an output from the series-connected circuit of switches 21 and 22 in FIG. 3(a) and outputs from the parallel-connected switches of 21 and 22 in FIG. 3(b), thereby monitoring the state of signals at relevant points and any fault of the switches.
The protection circuits of FIGS. 3(a) and 3(b) have a circuit construction called a power supply interruption system in which a power supply to the gate driving circuit is interrupted on an abnormality. Another type of protection circuit called a signal interruption system is known in which all the gate driving signals for the power conversion apparatus, six signals in the case of three-phase power conversion apparatus, are turned OFF using buffer ICs with 3-state output in place of the switches described above.
The following describes advantages and disadvantages in the power supply interruption system and in the signal interruption system. The power supply interruption system here is assumed to have two switches 21 and 22 as in FIGS. 3(a) and 3(b).
<Power Supply Interruption System>
(1) Series-Connected Redundancy Circuit (FIG. 3(a))
Advantage: The protection circuit is not adversely affected by change of states and variation of characteristics in the switches 21 and 22.
Disadvantage: it is impossible or extremely difficult to identify, in any short-circuit fault, which of the switches has short-circuited.
(2) Parallel-Connected Redundancy Circuit (FIG. 3(b))
Advantage: Since the CPU has received an output signal from each of the switches 21 and 22, it is rather ready to identify, in any short-circuit fault, which of the switches has short-circuited.
Disadvantage: Due to change of states and variation of characteristics in the switches 21 and 22, unintended operation occurs transiently. In addition, signal lines are necessary for transmitting output signals from the switches 21 and 22 to the CPU 13 in order to detect a short-circuit fault of each of the switches 21 and 22. When the CPU 13 and the switches 21 and 22 are placed on the separate circuit boards 10 and 20B as shown in FIG. 3(b), the number of connector terminals increases resulting in enlarged circuit board area and increased costs.
<Signal Interruption System>
(1) Series-Connected Redundancy Circuit
Advantage: The protection circuit is scarcely affected by change of states and variation of characteristics of each of the buffer ICs.
Disadvantage: A large number of objects for fault monitoring are necessary due to six gate signals in addition to terminal inputs. Moreover, in a fault in which one buffer IC is fixed to the enable condition, fault detection is impossible or extremely difficult.
(2) Parallel-Connected Redundancy Circuit
Advantage: A fault of each of the buffer ICs is rather readily detected.
Disadvantage: Due to change of states and variation of characteristics in the buffer ICs, unintended operation occurs transiently. In addition, a large number of objects are to be monitored as in the series-connected redundancy circuit, making the fault detection circuit complicated.
FIG. 4 shows a construction of an abnormality detection and protection circuit for, which semiconductor elements in a signal interruption system disclosed in Japanese Unexamined Patent Application Publication No. H09-238476. In FIG. 4, the reference numeral 30 represents a semiconductor switching element of an upper arm or a lower arm in a power conversion apparatus; 41 represents a short-circuit detection means; 42 represents an overcurrent detection means; 43 represents an insufficient voltage detection means; 44 represents overheating detection means; the reference numerals 51 through 54 represents abnormality storage circuits provided corresponding to the detection means 41 through 44; the reference numeral 60 represents abnormality informing circuits; 70 represents a general control system; 80 represents a driving circuit for generating a gate signal to the switching element 30; and the reference numeral 90 represents an operation stopping means.
The circuit of FIG. 4 detects various types of abnormalities in the switching element 30 by the detection means 41 through 44 and stores them in the abnormality storage circuits 51 through 54. When the abnormality is a type of requiring emergency protection, the operation stopping means 90 is operated based on the outputs from the abnormality storage circuits 51 through 54 and the gate signal for the switching element 30 is forced to be grounded, thereby stopping the operation of the switching element 30.
When the abnormality is not a type of requiring emergency protection, the outputs from the abnormality storage circuits 51 through 54 are sent through the abnormality informing circuits 60 to the general controlling system 70, which executes processing including change of logic of a switching command to be sent to the driving circuit 80, corresponding to the type of abnormality and the conditions of the switching elements in the other arm.
The protection circuit of the signal interruption system as described above needs a large number of monitoring objects and thus, the fault detection circuit tends to become complicated.
The protection circuit of the power supply interruption system is difficult to detect individual short-circuit fault of each switch separately. The parallel connected redundancy circuit in particular, needs the same number of signal lines and connector terminals as the number of switches in order to detect the individual short-circuit fault, which results in complicated circuits, enlarged circuit area, and increased costs.